The USBee SX in detail

The USBee SX is a Logic Analyzer. However, from a low-level view it is simply a colorful high-bandwidth 8 bit I/O controller, of which the lines can be set to input and output individually (external pinout).

The advantage over (for example) a PC parallel port based solution is that the chip handles the capturing and sending of data with a certain sample rate. The operating system will never get in the way and mess up timings so that data is missed. Also, now that I think of it, none of my computers actually has a parallel port anymore.

From what I read, it is based on a Cypress EZ-USB FX2 USB Microcontroller. The firmware is not stored on the device, but uploaded after enumeration. The data sheets of the chip are public, the instruction set is based on the ancient 8051.

The API for the USBee SX firmware is not documented, although this header file (from USBeeZXApp) will probably help understanding the protocol when sniffing USB traffic.

I have looked with usbsnoop and it seems that the setup sequence is pretty simple:

  • Bring 8051 in reset mode
  • Upload 4096 bytes of firmware at address 0 using control message 0xA0
  • Bring 8051 out of reset mode (jumps to address 0)
  • After this, the endpoints can be used to communicate with the device

See USBee SX protocol description for an overview of the parts of the protocol I have decoded yet.

Written on May 20, 2010